Integrated intelligent electrodes for electrical capacitance tomography

Preliminary investigations are described that consider the architecture for an electrical capacitance tomography system in which the processing circuitry for each `channel´ is mounted directly onto each electrode. The work is motivated by the desire to improve signal-to-noise by increasing the operating frequency. This, in turn, requires reduction of stray capacitance. Almost all of the electronic circuitry is included on a custom silicon integrated circuit that is implemented using a high voltage BiCMOS technology. The chip includes the front-end charge-discharge circuit with differential amplification, programmable gain and offset compensation, and analogue-to-digital conversion. Data communication with the host is via a serial shift register and each electrode requires less than 10 electrical connections