High density dual-active-device-layer (DUAL)-CMOS structure with vertical tungsten plug-in wirings

Author

Oyama, K. ; Kunio, T. ; Koh, R. ; Hayashi, Y. ; Kajiyana, K. ; Tsunenari, K.

Author_Institution

NEC Corp., Kanagawa, Japan

fYear

1990

fDate

9-12 Dec. 1990

Firstpage

59

Lastpage

62

Abstract

A dual-active-device-layer (DUAL)-CMOS structure has been developed for achieving high-density LSIs. It consists of NMOSFETs in a lower bulk-Si and PMOSFETs in an upper SOI film. The most important structural feature is that upper PMOSFET electrodes are directly interconnected to lower NMOSFET electrodes using a vertical tungsten plug-in wiring technique. The plug-in wirings allow the device area to be reduced to approximately 50% that of a conventional bulk-Si CMOS. The contact resistance of the plug-in wiring for the upper and lower MOSFETs did not affect the MOSFET characteristics. It was confirmed that the propagation delay time of a 43-stage ring oscillator was about 10% faster than that for a conventional bulk-Si CMOS.<>

Keywords

CMOS integrated circuits; large scale integration; metal-insulator-semiconductor structures; metallisation; semiconductor-insulator boundaries; silicon; silicon compounds; tungsten; DUAL-CMOS structure; NMOSFETs; PMOSFETs; SOI film; Si-SiO/sub 2/-W; contact resistance; dual-active-device-layer; high-density LSIs; propagation delay time; ring oscillator; semiconductor-insulator boundaries; vertical plug-in wirings; Contact resistance; Electrodes; MOSFETs; Propagation delay; Ring oscillators; Tungsten; Wiring;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1990. IEDM '90. Technical Digest., International

Conference_Location

San Francisco, CA, USA

ISSN

0163-1918

Type

conf

DOI

10.1109/IEDM.1990.237226

Filename

237226