DocumentCode :
3319206
Title :
Video Coding Tools and Their Impact on Compression Engine Architecture
Author :
Rao, Ajit V.
Author_Institution :
Texas Instrum. (India) Pvt. Ltd., TX, USA
fYear :
2010
fDate :
3-7 Jan. 2010
Firstpage :
458
Lastpage :
463
Abstract :
Video codec standards incorporate complex toolsets of algorithms that allow flexible trade-offs between compression efficiency, latency, and error resilience on one hand and power consumption, cost and memory bandwidth on the other. In this tutorial, we survey the most important video codec tools, the end-application scenarios they apply to, and their impact on the codec implementation architecture.
Keywords :
data compression; video codecs; video coding; codec implementation architecture; compression efficiency; compression engine architecture; error resilience; video codec standards; video coding; Code standards; Costs; Delay; Engines; Instruments; Quantization; Transform coding; Very large scale integration; Video codecs; Video coding; H.264; H.264 tools; Silicon area; VC1; codec architecture; codec chip; power consumption; video codec;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2010. VLSID '10. 23rd International Conference on
Conference_Location :
Bangalore
ISSN :
1063-9667
Print_ISBN :
978-1-4244-5541-6
Type :
conf
DOI :
10.1109/VLSI.Design.2010.72
Filename :
5401203
Link To Document :
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