DocumentCode :
3319260
Title :
FinFET SRAM Design
Author :
Joshi, Rajiv ; Kim, Keunwoo ; Kanj, Rouwaida
Author_Institution :
IBM TJ Watson Res. Center, Yorktown Heights, NY, USA
fYear :
2010
fDate :
3-7 Jan. 2010
Firstpage :
440
Lastpage :
445
Abstract :
This paper describes the SRAM design concept in FinFET technologies using unique features of non-planar double-gated devices. The parameter space required to design FinFETs is explored.Variety of SRAM design techniques are presented exploiting the advantages of tied gate and independent gate controlled configurations. SRAM performance, power, and stability for FinFET devices are compared with conventional planar CMOS counterparts. Modeling the variability of FinFETs through statistics is presented as well.
Keywords :
CMOS memory circuits; MOSFET; SRAM chips; integrated circuit design; CMOS; FinFET devices; SRAM design; Back; CMOS technology; Couplings; FinFETs; Insulation; Intrusion detection; MOSFET circuits; Random access memory; Silicon on insulator technology; Space technology; Double gate; FinFET; SRAM; variability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2010. VLSID '10. 23rd International Conference on
Conference_Location :
Bangalore
ISSN :
1063-9667
Print_ISBN :
978-1-4244-5541-6
Type :
conf
DOI :
10.1109/VLSI.Design.2010.88
Filename :
5401208
Link To Document :
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