• DocumentCode
    3319263
  • Title

    Incremental programming for reconfigurable engines

  • Author

    Lee, D. ; Lee, T.K. ; Luk, W. ; Cheung, P.Y.K.

  • Author_Institution
    Dept. of Comput., Imperial Coll., London, UK
  • fYear
    2002
  • fDate
    16-18 Dec. 2002
  • Firstpage
    411
  • Lastpage
    415
  • Abstract
    We present an incremental approach to developing programs for reconfigurable engines, systems which contain both instruction processors and reconfigurable hardware. The purpose is to support rapid production of prototypes, as well as their further systematic refinement and adaptation when required. The key elements of our approach include abstractions and tools based on high-level descriptions, and facilities for optimizations such as domain-specific data partitioning and run-time reconfiguration. The application of our approach is illustrated using the SONIC reconfigurable engine, which contains a multi-FPGA card in a PC system designed for video image processing.
  • Keywords
    field programmable gate arrays; hardware-software codesign; high level languages; optimisation; programming; reconfigurable architectures; video signal processing; EHC; PC system; SONIC system; domain-specific data partitioning; domain-specific optimizations; high-level descriptions; high-level language; incremental programming; instruction processors; multi-FPGA card; reconfigurable engines; reconfigurable hardware; run-time reconfiguration; video image processing; Computer aided instruction; Design optimization; Educational institutions; Engines; Field programmable gate arrays; Hardware; Image processing; Production systems; Refining; Runtime;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field-Programmable Technology, 2002. (FPT). Proceedings. 2002 IEEE International Conference on
  • Print_ISBN
    0-7803-7574-2
  • Type

    conf

  • DOI
    10.1109/FPT.2002.1188723
  • Filename
    1188723