DocumentCode
3319448
Title
Strassen´s matrix multiplication for customisable processors
Author
Ip, H.M.D. ; Low, J.D. ; Cheung, P.Y.K. ; Constantinides, G. ; Luk, W. ; Seng, S.P. ; Metzgen, P.
Author_Institution
Dept. of Comput., Imperial Coll., London, UK
fYear
2002
fDate
16-18 Dec. 2002
Firstpage
453
Lastpage
456
Abstract
Strassen´s algorithm is an efficient method for multiplying large matrices. We explore various ways of mapping Strassen´s algorithm into reconfigurable hardware that contains one or more customisable instruction processors. Our approach has been implemented using Nios processors with custom instructions and with custom-designed coprocessors, taking advantage of the additional logic and memory blocks available on a reconfigurable platform.
Keywords
coprocessors; instruction sets; matrix multiplication; reconfigurable architectures; Nios processors; Strassen´s matrix multiplication; custom-designed coprocessors; customisable instruction processors; reconfigurable hardware; Clustering algorithms; Computer architecture; Coprocessors; Educational institutions; Hardware; Logic devices; Partitioning algorithms; Reconfigurable logic; Registers; Software algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Technology, 2002. (FPT). Proceedings. 2002 IEEE International Conference on
Print_ISBN
0-7803-7574-2
Type
conf
DOI
10.1109/FPT.2002.1188734
Filename
1188734
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