DocumentCode
3319502
Title
Towards Active-Passive Co-synthesis of Multi-gigaHertz Radio Frequency Circuits
Author
Chakraborty, Ritochit ; Sathanur, Arun V. ; Jandhyala, Vikram
Author_Institution
Dept. of Electr. Eng., Univ. of Washington, Seattle, WA, USA
fYear
2010
fDate
3-7 Jan. 2010
Firstpage
381
Lastpage
386
Abstract
This paper proposes a methodology and framework for rapid active-passive co-synthesis of radio frequency circuits. The presented approach leverages advances in accelerated three-dimensional electromagnetic simulation technology to construct Maxwell-accurate parametric macromodels of on-chip passives, in particular spiral inductors. These macromodels can be used in the context of SPICE-level synthesis, thereby enabling concurrent sizing of passive and active components of radio frequency circuits. Moreover, macromodels obviate the need for topology exploration and parametric RLC model generation via optimization for on-chip passives. The co-synthesis framework is enabled by nonlinear, hyper-dimensional regression for macromodel generation and a simulated annealing based optimization scheme. As examples, and to demonstrate the efficacy of the proposed approach, two standard low-noise amplifier topologies are synthesized with tight performance constraints by co-optimization of circuit parameters and inductor geometries.
Keywords
active networks; circuit optimisation; integrated circuit modelling; passive networks; radiofrequency integrated circuits; Maxwell-accurate parametric macromodels; SPICE; active-passive co-synthesis; circuit parameters optimization; inductor geometries; low-noise amplifier; multi-gigahertz radio frequency circuits; on-chip passives; parametric RLC model generation; regression analysis; simulated annealing; three-dimensional electromagnetic simulation technology; Acceleration; Circuit simulation; Circuit synthesis; Circuit topology; Electromagnetic induction; Inductors; RLC circuits; Radio frequency; Simulated annealing; Spirals; Active-Passive Co-Synthesis; Algorithm; Ensemble Learning; Parametric Macromodel;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2010. VLSID '10. 23rd International Conference on
Conference_Location
Bangalore
ISSN
1063-9667
Print_ISBN
978-1-4244-5541-6
Type
conf
DOI
10.1109/VLSI.Design.2010.38
Filename
5401222
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