Register File customization for low power embedded processors

Power consumption is a critical design issue in embedded processors. One common component in the processor is the register file (RF). RF takes a large portion of processor area and consumes a significant amount of power. This paper proposes a customization approach at the hardware description modeling level to reduce the register file power consumption. The customization does not alter the RF interface to other hardware components and is completely transparent to software code. Therefore, it can be readily integrated into any processor design tool. We have applied our approach to a set of benchmarks. Our experimental results show that the power savings range from 18.3% to 45.5%; on average, 30.625% of register file power can be reduced.