• DocumentCode
    3320179
  • Title

    Safe-ERfair – A priori Overload Handling in Fair Scheduled Embedded Systems

  • Author

    Sarkar, Arnab ; Nanda, Rahul ; Ghose, Sujoy ; Chakrabarti, P.P.

  • Author_Institution
    Dept. of CSE, IIT Kharagpur, Kharagpur, India
  • fYear
    2010
  • fDate
    3-7 Jan. 2010
  • Firstpage
    128
  • Lastpage
    133
  • Abstract
    This paper presents Safe-ERfair, an efficient resource allocation strategy for handling overloads in real-time ERfair scheduled embedded systems. Each task has an assigned criticality value and consists of a mandatory part and an optional part. The scheduler employs an a priori look-ahead mechanism at the time of arrival of a new job to examine the occurrence of possible overloads during the execution period of the job and decide whether to accept/reject the new job and whether to execute the optional part in case the job is accepted. Execution time revisions are not allowed once the task is scheduled and this criterion is important in a large class of systems where such changes are not permitted. The objective is to maximize processor utilization by maximizing the reward for executing optional parts while not sacrificing the ERfairness timing constraints of the system and ensuring that all tasks are able to execute atleast their mandatory parts.
  • Keywords
    embedded systems; processor scheduling; resource allocation; ERfairness timing constraints; Safe-ERfair; a priori look-ahead mechanism; overload handling; processor utilization; real-time ERfair scheduled embedded systems; resource allocation strategy; Computational modeling; Degradation; Dynamic scheduling; Embedded system; Processor scheduling; Quality management; Real time systems; Resource management; Timing; Very large scale integration; ERfair Scheduling; Imprecise Computation; Overload Handling; Proportional Fair Scheduling; Real-time scheduling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 2010. VLSID '10. 23rd International Conference on
  • Conference_Location
    Bangalore
  • ISSN
    1063-9667
  • Print_ISBN
    978-1-4244-5541-6
  • Type

    conf

  • DOI
    10.1109/VLSI.Design.2010.27
  • Filename
    5401264