DocumentCode :
3320488
Title :
New failure mode induced by electric current in flip chip solder joint
Author :
Lin, Y.H. ; Hu, Y.C. ; Tsai, Johnson ; Kao, C. Robert
Author_Institution :
Dept. of Chem. & Mater. Eng., Nat. Central Univ., Taoyuan, Taiwan
fYear :
2002
fDate :
4-6 Dec. 2002
Firstpage :
253
Lastpage :
258
Abstract :
The effect of electric current on the failure mechanism of flip chip solder joints was studied. The solder used was Pb-Sn eutectic, and the joints had a diameter of 100 μm. The soldering pad on the chip-side had a Cu metallurgy, and that on the board-side had an Au/Ni/Cu metallurgy. The flip chip packages were placed in an oven set at 100°C, with 2×104 A/cm2 electric current passing through some of the joints in the packages. The rest of the solder joints, which were in the same package but without current passing through, were used as control. During current stressing, the chip surface temperature reached 157°C due to joule heating. A new failure mode induced by the electric current was found. The joints failed by very extensive Cu dissolution on the chip-side. Not only part of the Cu soldering pad was dissolved, but also part of the internal Cu conducting trace within the chip. The dissolved region was back-filled with solder. Large amount of Cu6Sn5 intermetallic was present inside the solder joint. The source of Cu in Cu6Sn5 was from the dissolved Cu pad and trace. The site of failure was at the conducting trace that had been back-filled with solder, where a much greater current density was present due to a smaller cross-section.
Keywords :
circuit reliability; copper; current density; electromigration; eutectic alloys; failure analysis; fine-pitch technology; flip-chip devices; lead alloys; packaging; printed circuits; soldering; tin alloys; 100 degC; 157 degC; 50 micron; Au-Ni-Cu; Au/Ni/Cu pad metallurgy; Cu; Cu dissolution; Cu soldering pad; Cu6Sn5; Cu6Sn5 intermetallic; Pb-Sn; Pb-Sn eutectic solder joints; current density; current stressing; electric current; failure mechanism; flip chip packages; flip chip solder joints; joule heating; Current; Failure analysis; Flip chip; Flip chip solder joints; Gold; Ovens; Packaging; Soldering; Temperature; Tin;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Materials and Packaging, 2002. Proceedings of the 4th International Symposium on
Print_ISBN :
0-7803-7682-X
Type :
conf
DOI :
10.1109/EMAP.2002.1188846
Filename :
1188846
Link To Document :
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