DocumentCode :
3321227
Title :
Network-on-Chip Implementation of Midimew-Connected Mesh Network
Author :
Awal, Md Rabiul ; Hafizur Rahman, M.M.
Author_Institution :
KICT, Dept. of Comput. Sci., Int. Islamic Univ. Malaysia (IIUM), Kuala Lumpur, Malaysia
fYear :
2013
fDate :
16-18 Dec. 2013
Firstpage :
265
Lastpage :
271
Abstract :
Architecture of interconnection network plays a significant role in the performance and energy consumption of Network-on-Chip (NoC) systems. In this paper we propose NoC implementation of Midi mew-connected Mesh Network (MMN). MMN is a Minimal Distance Mesh with Wrap-around (Midi mew) links network of multiple basic modules, in which the basic modules are 2D-mesh networks that are hierarchically interconnected for higher-level networks. For implementing all the links of level-3 MMN, minimum 4 layers are needed which is feasible with current and future VLSI technologies. With innovative combination of diagonal and hierarchical structure, MMN possesses several attractive features including constant node degree, small diameter, low cost, small average distance, and moderate bisection width than that of other conventional and hierarchical interconnection networks.
Keywords :
multiprocessor interconnection networks; network-on-chip; 2D-mesh networks; MMN; NoC systems; hierarchical interconnection networks; midimew-connected mesh network; minimal distance mesh with wrap-around links network; network-on-chip implementation; Mesh networks; Multiprocessor interconnection; Network-on-chip; Ports (Computers); Transistors; Very large scale integration; Interconnection Network; MMN; Midimew; Network on Chip; System on Chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Computing, Applications and Technologies (PDCAT), 2013 International Conference on
Conference_Location :
Taipei
Print_ISBN :
978-1-4799-2418-9
Type :
conf
DOI :
10.1109/PDCAT.2013.48
Filename :
6904265
Link To Document :
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