Rethinking Threshold Voltage Assignment in 3D Multicore Designs

Due to the inherent nature of heat flow in 3D integrated circuits, stacked dies exhibit a wide range of thermal characteristics. The strong dependence of leakage with temperature and process variation plays havoc in achieving system level energy efficiency in such systems, complicating the task of power provisioning in 3D multicores. In this paper, we address this power provisioning challenge in 3D ICs by advocating a novel microprocessor design paradigm, where the circuit designers are aware of the intended placement of a die in a 3D stack. We present a concrete application of this paradigm through a threshold voltage (V_t) assignment algorithm for a 3D multicore system, where we specifically account for: (a) the change in the role of leakage power, (b) expected operating frequency, and (c) dependency of PV induced leakage variation and V_t levels. Detailed simulation based experiments with our proposed algorithm show 2-15% improvement in energy efficiency for a typical multicore system organized as 3D stacked dies.