• DocumentCode
    3322049
  • Title

    Impact of Temperature on Test Quality

  • Author

    Jagan, Lavanya ; Hora, Camelia ; Kruseman, Bram ; Eichenberger, Stefan ; Majhi, Ananta K. ; Kamakoti, V.

  • Author_Institution
    Dept. of CSE, IIT - Madras, Chennai, India
  • fYear
    2010
  • fDate
    3-7 Jan. 2010
  • Firstpage
    276
  • Lastpage
    281
  • Abstract
    The usage of more advanced, less mature processes during manufacturing of semiconductor devices has increased the need for performing unconventional types of testing, like temperature-testing, in order to maintain the same high quality levels. However, performing temperature-testing is costly. This paper proposes a viable low-cost alternative to temperature testing that quantifies the impact of temperature variations on the test quality and also determines optimal test conditions. The test flow proposed is empirically validated on an industrial-standard die. The results obtained show that majority of the defects that were originally detected by temperature-testing are also detected by the proposed test flow, thereby reducing the dependence on temperature testing to achieve zero-defect quality. Details of an interesting defect behavior at cold test conditions is also presented.
  • Keywords
    fault diagnosis; integrated circuit manufacture; integrated circuit testing; quality assurance; defect detection; semiconductor device manufacturing; temperature testing; test quality; very-low voltage testing; zero-defect quality; Delay effects; Frequency; Low voltage; Manufacturing processes; Materials testing; Performance evaluation; Production; Semiconductor device testing; Temperature dependence; Very large scale integration; Temperature Testing; Testing; VLSI Diagnoses; VLSI Testing; Volume Yield Diagnoses;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 2010. VLSID '10. 23rd International Conference on
  • Conference_Location
    Bangalore
  • ISSN
    1063-9667
  • Print_ISBN
    978-1-4244-5541-6
  • Type

    conf

  • DOI
    10.1109/VLSI.Design.2010.49
  • Filename
    5401358