Title :
Parallel processing techniques for the processing of synthetic aperture radar data on GPUs
Author :
Chapman, William ; Ranka, Sanjay ; Sahni, Sartaj ; Schmalz, Mark ; Majumder, Uttam ; Moore, Linda ; Elton, Bracy
Author_Institution :
Dept. of CISE, Univ. of Florida, Gainesville, FL, USA
Abstract :
This paper presents a design for parallel processing of synthetic aperture radar (SAR) data using one or more Graphics Processing Units (GPUs). Our design supports real- time reconstruction of a two-dimensional image from a matrix of echo pulses and their corresponding response values. Key to our design is a dual partitioning scheme that divides the output image into tiles and divides the input matrix into sets of pulses. Pairs comprised of an image tile and a pulse set are distributed to thread blocks in a GPU, thus facilitating parallel computation. Memory access latency is masked by the GPU´s low-latency thread scheduling. Our performance analysis quantifies latency as a function of the input and output parameters. Experimental results were generated with an nVidia Tesla C2050 GPU having maximum throughput of 1030 Gflop/s. Our design achieves peak throughput of 293 Gflop/s, which scales well for output image sizes from 2,048 × 2,048 pixels to 4,096 × 4,096 pixels. Higher throughput can be obtained by distributing the pulse matrix across multiple GPUs and combining the results at a host device.
Keywords :
data analysis; graphics processing units; image classification; image reconstruction; matrix algebra; parallel memories; parallel programming; radar clutter; radar computing; radar imaging; synthetic aperture radar; SAR data processing; dual partitioning scheme; echo pulse matrix; graphics processing unit; image classification; image reconstruction; latency thread scheduling; memory access latency; nVidia Tesla C2050 GPU; parallel computation; parallel processing techniques; synthetic aperture radar; Algorithm design and analysis; Graphics processing unit; Image reconstruction; Instruction sets; Parallel processing; Throughput; Tiles;
Conference_Titel :
Signal Processing and Information Technology (ISSPIT), 2011 IEEE International Symposium on
Conference_Location :
Bilbao
Print_ISBN :
978-1-4673-0752-9
Electronic_ISBN :
978-1-4673-0751-2
DOI :
10.1109/ISSPIT.2011.6151626