Title :
A programmable vision chip with pixel-neighborhood level parallel processing
Author :
Schmitz, Joseph A. ; Gharzai, Mahir Kabeer ; Balkir, Sina ; Hoffman, Michael W. ; White, Daniel J. ; Schemm, Nathan
Author_Institution :
Dept. of Electr. Eng., Univ. of Nebraska-Lincoln, Lincoln, NE, USA
Abstract :
This paper presents a novel vision chip architecture based on pixel-neighborhood level parallel processing. The architecture consists of neighborhoods of 8×8 digital pixel sensors, where each group of 8×8 sensors is physically embedded within its own neighborhood processing core on the same focal plane. To that end, a low complexity neighborhood processor architecture along with a general-purpose, 8-bit instruction set has been designed and implemented. This allows program execution to be carried out in parallel on a two-dimensional array of pixel-neighborhood processing cores, allowing for direct scalability in terms of resolution. A prototype vision chip housing an array of 8×10 neighborhoods with a 64×80 resolution has been designed and fabricated in a 0.13 μm fabrication process. The single-chip vision system can be programmed to perform a variety of image and video processing tasks. A number of image processing tasks are presented to demonstrate the functionality of pixel-neighborhood level parallelism.
Keywords :
CMOS image sensors; electronic engineering computing; instruction sets; parallel processing; digital pixel sensors; focal plane; general-purpose 8-bit instruction set; image processing tasks; low complexity neighborhood processor architecture; pixel-neighborhood level parallel processing; pixel-neighborhood level parallelism; pixel-neighborhood processing cores; single-chip vision system; two-dimensional array; vision chip architecture; word length 8 bit; Arrays; CMOS integrated circuits; Histograms; Image resolution; Registers; Sensors;
Conference_Titel :
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location :
Lisbon
DOI :
10.1109/ISCAS.2015.7169099