DocumentCode
3323719
Title
Introducing deglitched-feedback plus convergent encoding for straight hardware implementation of asynchronous finite state machines
Author
Pedroni, Volnei A.
Author_Institution
Fed. Technol. Univ. of Parana State (UTFPR), Curitiba, Brazil
fYear
2015
fDate
24-27 May 2015
Firstpage
2345
Lastpage
2348
Abstract
Asynchronous finite state machines (AFSMs) are of interest in a number of areas, particularly when simplifying the hardware and/or reducing power consumption are essential. The design of reliable standalone (no handshake signals needed) AFSMs, however, is complex due to especially possible signal races, which seriously limit their widespread use. We introduce a fundamental modification, which consists of replacing the delays in the feedback loop with deglitchers. This simple modification, combined with a proposed convergent state encoding, allows standalone AFSMs to finally be implemented nearly as easily as conventional (synchronous) FSMs, even for burst-mode operation. A helpful tool for analyzing AFSMs is also introduced. The benefits of the proposed approach are confirmed in the experiments, developed with VHDL and FPGAs.
Keywords
encoding; finite state machines; logic design; FPGA; VHDL; asynchronous finite state machines; convergent state encoding; deglitched-feedback plus convergent encoding; feedback loop delay replacement; standalone AFSM; straight hardware implementation; Automata; Delays; Encoding; Feedback loop; Field programmable gate arrays; Flip-flops; Inverters; AFSM; FSM; asynchronous state machine; convergent encoding; deglitcher; low power;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location
Lisbon
Type
conf
DOI
10.1109/ISCAS.2015.7169154
Filename
7169154
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