DocumentCode :
3323832
Title :
High speed implementation of 1-D and 2-D morphological operations
Author :
Vlontzos, John
Author_Institution :
Siemens Corporate Res., Princeton, NJ, USA
fYear :
1991
fDate :
2-4 Sep 1991
Firstpage :
249
Lastpage :
262
Abstract :
The design of a morphological processing system is presented, to be used in medical image enhancement and compression. The system consists of a gray scale dilation/erosion systolic array capable of video data rates. The architecture can be implemented with either one dimensional or two dimensional building blocks that accept raster scanned data and exhibits low latency and an optimal pipeline rate. Two processing element designs are presented, one based on programmable gate arrays and one suitable for standard cell VLSI implementation
Keywords :
VLSI; data compression; logic arrays; medical image processing; systolic arrays; gray scale dilation/erosion systolic array; image compression; medical image enhancement; morphological operations; processing element; programmable gate arrays; standard cell VLSI implementation; video data rates; Biomedical imaging; Delay; Image coding; Image enhancement; Morphological operations; Pipelines; Process design; Systolic arrays; Very large scale integration; Video compression;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application Specific Array Processors, 1991. Proceedings of the International Conference on
Conference_Location :
Barcelona
Print_ISBN :
0-8186-9237-5
Type :
conf
DOI :
10.1109/ASAP.1991.238880
Filename :
238880
Link To Document :
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