Mapping different node types of dependence graphs into the same processing element

Author

Vehlies, Uwe

Author_Institution

Lab. fur Informationstechnol., Hannover Univ., Germany

fYear

1991

fDate

2-4 Sep 1991

Firstpage

72

Lastpage

86

Abstract

This paper presents a method for mapping different computation nodes into the same complex processing element. The processing elements which use the minimal number of building blocks are derived automatically from the computations of the different nodes. Known design procedures for mapping algorithms onto array processors can be extended by this method to allow the mapping of dependence graphs with different types of nodes onto signal flow graphs with complex processing elements. The implementation of the presented approach in the CAD-tool DECOMP extends the automatic design of VLSI array processors

Keywords

VLSI; circuit CAD; digital signal processing chips; parallel processing; CAD-tool DECOMP; VLSI array processors; array processors; building blocks; computation nodes; dependence graphs; design procedures; node types mapping; processing element; signal flow graphs; Algorithm design and analysis; Automatic control; Digital signal processing; Laboratories; Process design; Signal design; Signal mapping; Signal processing; Signal processing algorithms; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Application Specific Array Processors, 1991. Proceedings of the International Conference on

Conference_Location

Barcelona

Print_ISBN

0-8186-9237-5

Type

conf

DOI

10.1109/ASAP.1991.238892

Filename

238892