DocumentCode
3324077
Title
Transformation of systolic algorithms for interleaving partitions
Author
Fernández, A. ; Llabería, J.M. ; Navarro, J.J. ; Valero-García, M.
Author_Institution
Dept. d´´Arquitectura de Computadors, Univ. Politecnica de Catalunya, Barcelona, Spain
fYear
1991
fDate
2-4 Sep 1991
Firstpage
56
Lastpage
71
Abstract
A systematic method to map systolic problems onto multicomputers is presented. A systolic problem is a problem for which it is possible to design a systolic algorithm. This method selects and transforms the systolic algorithm into a parallel algorithm with high granularity. The communications requirements are reduced and the performance can be increased. The proposed scheme requires a classification of dependences and it is based on the interleaved execution of several partitions of the systolic algorithm. The code to be executed in a processing element of the multicomputer system is obtained through application of the proposed systematic transformations to the original sequential code. By applying this method to algebraic path problem (APP), the authors illustrate the main features, and several performance measures for a torus of transputers system are presented, considering the various algorithms which are unified by the APP
Keywords
parallel algorithms; performance evaluation; systolic arrays; communications requirements; high granularity; interleaving partitions; parallel algorithm; performance measures; processing element; systolic algorithms transformations; torus of transputers system; Algorithm design and analysis; Costs; Distributed computing; Formal specifications; Interleaved codes; Iterative algorithms; Message passing; Parallel algorithms; Partitioning algorithms; Processor scheduling;
fLanguage
English
Publisher
ieee
Conference_Titel
Application Specific Array Processors, 1991. Proceedings of the International Conference on
Conference_Location
Barcelona
Print_ISBN
0-8186-9237-5
Type
conf
DOI
10.1109/ASAP.1991.238893
Filename
238893
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