Title :
Automatic synthesis of VLSI control paths for high level specifications
Author :
Su, Shyang-Tai ; Makki, Rafic Z. ; Chen, Su-Shing ; Bou-Ghazale, Silvio
Author_Institution :
North Carolina Univ., Charlotte, NC, USA
Abstract :
A tool is presented for designing finite-state machines. The tool allows for several synthesis options which include: one-shot encoding; programmable logic arrays; and decoding and minimization. A common high-level description capability is provided for all three synthesis options. The proposed tool, called SSC (structured system control), is applied to the design of a control path for a neural net model. The advantages and disadvantages of each synthesis option are discussed
Keywords :
VLSI; cellular arrays; circuit CAD; decoding; encoding; logic CAD; logic arrays; neural nets; CAD; SSC tool; VLSI control paths; automatic synthesis; common high-level description capability; computer aided design; decoding; finite state machine design; high level specifications; logic design; minimization; neural net model; one-shot encoding; programmable logic arrays; structured system control; Automatic control; Circuit synthesis; Circuit testing; Control system synthesis; Decoding; Flip-flops; Logic circuits; Minimization methods; Programmable logic arrays; Very large scale integration;
Conference_Titel :
Southeastcon '89. Proceedings. Energy and Information Technologies in the Southeast., IEEE
Conference_Location :
Columbia, SC
DOI :
10.1109/SECON.1989.132561
