High speed, smart focal plane processing using integrated photodetectors and Si CMOS VLSI sigma delta analog to digital converters

Author

YoungJoong Joo ; Fike, S. ; Thomas, M. ; Kee Shik Chung ; Brooke, M. ; Jokerst, N.M. ; Scott Wills, D.

Author_Institution

Sch. of Electr. Eng., Georgia Inst. of Technol., Atlanta, GA, USA

fYear

1998

fDate

20-24 July 1998

Abstract

We report on the first demonstration of a high frame rate smart pixel imaging system which uses an ADC for in each pixel in an 8x8 integrated detector array. The smart pixel architecture of this system enables frame rates up to 100 kfps operating in continuous imaging mode.

Keywords

CMOS image sensors; CMOS integrated circuits; analogue-digital conversion; driver circuits; integrated optoelectronics; optical arrays; photodetectors; silicon; 8x8 integrated detector array; ADC; Si; Si CMOS VLSI sigma delta analog to digital converters; continuous imaging mode; frame rates; high frame rate smart pixel imaging system; high speed smart focal plane processing; integrated photodetectors; smart pixel architecture; CMOS process; Charge coupled devices; Circuit testing; Delta-sigma modulation; Detectors; Optical imaging; Photodetectors; Signal to noise ratio; Smart pixels; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Broadband Optical Networks and Technologies: An Emerging Reality/Optical MEMS/Smart Pixels/Organic Optics and Optoelectronics. 1998 IEEE/LEOS Summer Topical Meetings

Conference_Location

Monterey, CA, USA

Print_ISBN

0-7803-4953-9

Type

conf

DOI

10.1109/LEOSST.1998.690447

Filename

690447