DocumentCode
332583
Title
Configuring arithmetic pattern generators and response compactors from the RT-modules of a circuit
Author
Mayer, Frank ; Stroele, Albrecht P.
Author_Institution
Inst. of Comput. Design & Fault Tolerance, Karlsruhe Univ., Germany
fYear
1998
fDate
2-4 Dec 1998
Firstpage
15
Lastpage
20
Abstract
In recent years, accumulators have been shown to be efficient pattern generators and response compactors for built-in self-test. Many circuits contain modules which can be configured as accumulators just by controlling these modules adequately. This paper presents algorithms that find all possible accumulator configurations in a circuit and optimize the control of the accumulator test application or or inexpensive test control implementation
Keywords
automatic test pattern generation; built-in self test; logic testing; RT-modules; accumulators; arithmetic pattern generators; built-in self-test; response compactors; test control implementation; Adders; Arithmetic; Automatic testing; Built-in self-test; Circuit testing; Clocks; Degradation; Digital arithmetic; Fault tolerance; Hardware; Libraries; Multiplexing; Registers; Shift registers; Signal generators; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 1998. ATS '98. Proceedings. Seventh Asian
ISSN
1081-7735
Print_ISBN
0-8186-8277-9
Type
conf
DOI
10.1109/ATS.1998.741571
Filename
741571
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