A 2GHz direct digital frequency synthesizer based on multi-channel structure

Author

Ling Yuan ; Qiang Zhang ; Yin Shi

Author_Institution

Inst. of Semicond., Beijing, China

fYear

2015

fDate

24-27 May 2015

Firstpage

3064

Lastpage

3067

Abstract

This paper presents a direct digital frequency synthesizer (DDFS) for high speed application based on multichannel structure. This DDFS has phase resolution of 32 bits and magnitude resolution of 12 bits. In order to ensure the high speed and high resolution at the same time, the multi-channel sampling technique is used and a 12 bits linear DAC is implemented. The chip is fabricated in TSMC 130nm CMOS technology with active area of 0.89mm×0.98mm and total power consumption of 300mW at a single 1.2V supply voltage. The maximum operating speed is up to 2.0GHz at room temperature.

Keywords

CMOS integrated circuits; digital-analogue conversion; direct digital synthesis; low-power electronics; TSMC CMOS technology; direct digital frequency synthesizer; frequency 2 GHz; high speed application; linear DAC; magnitude resolution; multichannel sampling; multichannel structure; phase resolution; power 300 mW; power consumption; size 130 nm; temperature 293 K to 298 K; voltage 1.2 V; word length 12 bit; word length 32 bit; Arrays; CMOS integrated circuits; Clocks; Frequency measurement; Frequency synthesizers; Read only memory; Table lookup; direct digital frequency synthesizer (DDFS); multichannel; phase-to-sine-amplitude converters (PSAC);

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2015 IEEE International Symposium on

Conference_Location

Lisbon

Type

conf

DOI

10.1109/ISCAS.2015.7169334

Filename

7169334