Title :
The effect of annealing temperature on the electron emission characteristics of silicon tips coated with Ba0.67Sr0.33 TiO3 thin film
Author :
Kang, W.P. ; Wisitsora-at, A. ; Davidson, J.L. ; Tan, O.K. ; Zhu, W.G. ; Li, Q. ; Xu, J.F.
Author_Institution :
Dept. of Electr. & Comput. Eng., Vanderbilt Univ., Nashville, TN, USA
Abstract :
Electron emission from an array of silicon tips coated with Ba0.67Sr0.33TiO3 (BST) ferroelectric thin film was systematically investigated by varying the sol-gel BST annealing temperature. It was found that the turn-on electric field of BST coated silicon tips decreases as the BST annealing temperature increases. Analysis of the emission data using Fowler-Nordheim plots, suggested that a higher annealing temperature would result in lower effective work function. To better understand this effect, solid-state BST-silicon junction I-V measurements for different annealing temperatures were studied. The analysis suggests that the conduction mechanism of BST-silicon junction conforms to a space-charge limited injection current (SCLC) model with shallow and deep traps. The higher BST annealing temperature, the shallower the trap was found to be and the quasi-Fermi level was nearer to the conduction band. It can be deduced that higher annealing. temperature results in higher activation of ionic conduction. This higher activation increases carrier concentration, raises the Fermi level toward the conduction band, thus reduces the effective work function, and thereby enhances field emission
Keywords :
Fermi level; annealing; barium compounds; carrier density; electron field emission; elemental semiconductors; ferroelectric thin films; ionic conductivity; silicon; sol-gel processing; space-charge-limited conduction; strontium compounds; work function; BST ferroelectric thin film coating; Ba0.67Sr0.33TiO3-Si; Fowler-Nordheim plot; I-V characteristics; annealing temperature; carrier concentration; deep traps; electron emission; ionic conduction; quasi-Fermi level; shallow traps; silicon tip array; sol-gel synthesis; solid-state BST-silicon junction; space charge limited injection current; tum-on electric field; work function; Annealing; Binary search trees; Coatings; Electron emission; Ferroelectric films; Ferroelectric materials; Semiconductor thin films; Silicon; Solid state circuits; Temperature;
Conference_Titel :
Vacuum Microelectronics Conference, 2001. IVMC 2001. Proceedings of the 14th International
Conference_Location :
Davis, CA
Print_ISBN :
0-7803-7197-6
DOI :
10.1109/IVMC.2001.939682