DocumentCode
332715
Title
Lazy transition systems: application to timing optimization of asynchronous circuits
Author
Cortadella, J. ; Kishinevsky, M. ; Kondratyev, A. ; Lavagno, L. ; Taubin, A. ; Yakovlev, A.
Author_Institution
Univ. Politecnica de Catalunya, Barcelona, Spain
fYear
1998
fDate
8-12 Nov. 1998
Firstpage
324
Lastpage
331
Abstract
The paper introduces Lazy Transitions Systems (LzTSs). The notion of laziness explicitly distinguishes between the enabling and the firing of an event in a transition system. LzTSs can be effectively used to model the behavior of asynchronous circuits in which relative timing assumptions can be made on the occurrence of events. These assumptions can be derived from the information known a priori about the delay of the environment and the timing characteristics of the gates that will implement the circuit. The paper presents necessary conditions to synthesize circuits with a correct behavior under the given timing assumptions. Preliminary results show that significant area and performance improvements can be obtained by exploiting the extra "don\´t care" space implicitly provided by the laziness of the events.
Keywords
asynchronous circuits; high level synthesis; timing; Lazy Transitions Systems; LzTSs; asynchronous circuits; laziness; performance improvements; relative timing assumptions; timing assumptions; timing characteristics; timing optimization; Asynchronous circuits; Circuit synthesis; Concurrent computing; Delay; Design methodology; Permission; Switches; Switching circuits; Timing; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 1998. ICCAD 98. Digest of Technical Papers. 1998 IEEE/ACM International Conference on
Conference_Location
San Jose, CA, USA
Print_ISBN
1-58113-008-2
Type
conf
DOI
10.1109/ICCAD.1998.144286
Filename
742892
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