Title :
On a Scalable, Non-Blocking Optical Router for Photonic Networks-on-Chip Designs
Author :
Tan, Xianfang ; Yang, Mei ; Zhang, Lei ; Jiang, Yingtao ; Yang, Jianyi
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Nevada, Las Vegas, NV, USA
Abstract :
Photonic Networks-on-Chip (NoC) is considered as a promising candidate to interconnect a large number of processing cores. The heart of a photonic NoC is the on chip photonic interconnection network which is composed of silicon waveguides and optical routers. In this paper, we propose a scalable and non-blocking passive optical router design using micro-ring resonators (MRRs), namely the generic wavelength-routed optical router (GWOR). We first introduce a 4×4 GWOR router structure and then show how to construct larger size GWORs using 4×4 GWOR as the basic building block The wavelength assignment schemes for any size GWORs are also derived. For N×N GWOR, N-l input wavelengths are needed and iV-2 different types of MRRs are used. The analysis shows that 4×4 GWOR uses the least number of MMRs and has the least power loss compared with existing router designs.
Keywords :
elemental semiconductors; micro-optics; multiprocessor interconnection networks; network routing; network-on-chip; optical design techniques; optical interconnections; optical resonators; optical waveguides; silicon; 4x4 GWOR; N-1 input wavelengths; NxN GWOR; generic wavelength-routed optical router; microring resonators; nonblocking optical router; on-chip photonic interconnection network; photonic networks-on-chip design; power loss; silicon waveguides; Optical resonators; Optical switches; Optical waveguides; Photonics; Shape; Silicon; Wavelength assignment;
Conference_Titel :
Photonics and Optoelectronics (SOPO), 2011 Symposium on
Conference_Location :
Wuhan
Print_ISBN :
978-1-4244-6555-2
DOI :
10.1109/SOPO.2011.5780550