DocumentCode
3327287
Title
Novel cmp-based process for fabricating arrays of double-gated silicon field emitters
Author
Dvorson, L. ; Kymissis, I. ; Akinwande, A.I.
Author_Institution
Microsystems Technol. Lab., MIT, Cambridge, MA, USA
fYear
2001
fDate
2001
Firstpage
139
Lastpage
140
Abstract
Arrays of field emitters with a vertically stacked double gate were fabricated and characterized. Lowering the focus bias from 35 V to 9 V reduced spot size from 0.81 mm to 0.15 mm
Keywords
chemical mechanical polishing; electron field emission; elemental semiconductors; silicon; vacuum microelectronics; 0.81 to 0.15 mm; 35 to 9 V; Si; cmp-based process; double-gated Si field emitters; fabricating arrays; focus bias; spot size; vertically stacked double gate; Anisotropic magnetoresistance; Electron emission; Etching; Fabrication; Field emitter arrays; Laboratories; Oxidation; Plasma applications; Silicon; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Vacuum Microelectronics Conference, 2001. IVMC 2001. Proceedings of the 14th International
Conference_Location
Davis, CA
Print_ISBN
0-7803-7197-6
Type
conf
DOI
10.1109/IVMC.2001.939692
Filename
939692
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