DocumentCode
3328613
Title
Acquisition performance of a digital phase locked loop with a four-quadrant arctan phase detector
Author
Kandeepan, Sithamparanathan ; Reisenfeld, Sam
Author_Institution
Wireless Signal Process. Group, Nat. ICT Australia, Braddon, ACT, Australia
fYear
2004
fDate
18-19 Nov. 2004
Firstpage
648
Lastpage
653
Abstract
The acquisition performance of a digital phase locked loop (DPLL) with a four-quadrant arctan based phase detector (PD) is discussed. In the noiseless case, unlike the traditional sine function based phase locked loops, the acquisition process of the four-quadrant arctan based phase locked loops is less tedious. We look into the pull-in process together with a time-series analysis of the DPLL for the noiseless case. The phase-plane portrait of the loop is also discussed, for both the noiseless and the noisy conditions.
Keywords
digital phase locked loops; phase detectors; signal detection; time series; acquisition performance; digital phase locked loop; four-quadrant arctan phase detector; phase-plane portrait; pull-in process; sine function; time-series analysis; Application software; Australia; Detectors; Digital signal processing; Frequency; Phase detection; Phase locked loops; Phase noise; Signal processing; Signal to noise ratio;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Signal Processing and Communication Systems, 2004. ISPACS 2004. Proceedings of 2004 International Symposium on
Print_ISBN
0-7803-8639-6
Type
conf
DOI
10.1109/ISPACS.2004.1439139
Filename
1439139
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