DocumentCode :
3329310
Title :
A hardware design of navigation receiver signal processing platform
Author :
Wang, Wei ; Wang, Chuncheng ; Hao, Yanling
Author_Institution :
Robot. Inst. of HIT, Harbin Inst. of Technol., Harbin
fYear :
2009
fDate :
22-25 Feb. 2009
Firstpage :
2139
Lastpage :
2143
Abstract :
A hardware design of receiver which uses the FPGA + DSP + ARM structure is presented in this paper. The communication between functional units and display control units are discussed on the research of integrated OEM board for traditional receivers. The experiment result shows that the signal platform has the low power dissipation, small size, high performances, so it is very suitable for radio receiving.
Keywords :
digital signal processing chips; field programmable gate arrays; hardware-software codesign; low-power electronics; radio receivers; radionavigation; ARM structure; DSP; FPGA; display control units; functional units; hardware design; integrated OEM board; low power dissipation; navigation receiver signal processing platform; radio receiving; Communication system control; Digital signal processing; Displays; Field programmable gate arrays; Hardware; Navigation; Power dissipation; Receivers; Signal design; Signal processing; ARM; DSP; FPGA; navigation receiver;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Robotics and Biomimetics, 2008. ROBIO 2008. IEEE International Conference on
Conference_Location :
Bangkok
Print_ISBN :
978-1-4244-2678-2
Electronic_ISBN :
978-1-4244-2679-9
Type :
conf
DOI :
10.1109/ROBIO.2009.4913333
Filename :
4913333
Link To Document :
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