• DocumentCode
    3329394
  • Title

    Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures

  • Author

    Wolinski, Christophe ; Kuchcinski, Krzysztof ; Teich, Jürgen ; Hannig, Frank

  • Author_Institution
    IRISA, Univ. of Rennes I, Rennes
  • fYear
    2008
  • fDate
    3-5 Sept. 2008
  • Firstpage
    345
  • Lastpage
    352
  • Abstract
    In this paper, we introduce a constraint programming-based approach for optimization of routing and reconfiguration overhead for a class of reconfigurable processor array architectures called weakly programmable. For a given set of different algorithms the execution of which is supposed to be switched upon request at run-time, we provide static solutions for optimal routing of data between processors as well as for minimization of the routing area and the reconfiguration overhead when switching between the execution of these algorithms. In fact, applying the switching can be accomplished in just a few clock cycles. Our experiments confirm that our method can minimize routing overhead and reduce reconfiguration time significantly.
  • Keywords
    constraint handling; network routing; optimisation; reconfigurable architectures; clock cycles; communication network reconfiguration overhead; constraint programming-based approach; optimal routing; programmable processor array; reconfigurable processor; Communication networks; Communication switching; Computer architecture; Constraint optimization; Design optimization; Field programmable gate arrays; Hardware; Network-on-a-chip; Routing; Runtime;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Digital System Design Architectures, Methods and Tools, 2008. DSD '08. 11th EUROMICRO Conference on
  • Conference_Location
    Parma
  • Print_ISBN
    978-0-7695-3277-6
  • Type

    conf

  • DOI
    10.1109/DSD.2008.1
  • Filename
    4669255