DocumentCode :
3329967
Title :
How to Live with Uncertainties: Exploiting the Performance Benefits of Self-Timed Logic In Synchronous Design
Author :
Paci, G. ; Nackaerts, A. ; Catthoor, F. ; Benini, L. ; Marchal, P.
Author_Institution :
DEIS, Univ. of bologna, Bologna
fYear :
2008
fDate :
3-5 Sept. 2008
Firstpage :
550
Lastpage :
557
Abstract :
Ultra low power digital systems are key for any future wireless sensor nodes but also inside nomadic embedded systems (such as inside the digital front end of software defined radios). These systems require the highest possible energy efficiency of logic, which can only be achieved by operating in moderate inversion. Unfortunately, when operating near the threshold voltage, transistors become highly sensitive to process variations, thereby increasing leakage currents and complicating timing closure. Rather than pursuing a worst-case design approach for dealing with these uncertainties, we present a hybrid self-timed/synchronous approach. It will be demonstrated on the VEX VLIW core designed for ultra low-power operations. Experimental results of our approach demonstrate performance benefits up to 2times and significant energy savings at low throughput rates.
Keywords :
leakage currents; logic circuits; logic design; low-power electronics; energy efficiency; leakage current; nomadic embedded system; self-timed logic; software defined radio; synchronous design; threshold voltage; ultra low power digital system; wireless sensor node; Digital systems; Embedded system; Energy efficiency; Leakage current; Logic design; Sensor systems; Software radio; Threshold voltage; Uncertainty; Wireless sensor networks; Self-timed; clock-gating; completion-detection; hand-shaking;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Digital System Design Architectures, Methods and Tools, 2008. DSD '08. 11th EUROMICRO Conference on
Conference_Location :
Parma
Print_ISBN :
978-0-7695-3277-6
Type :
conf
DOI :
10.1109/DSD.2008.114
Filename :
4669284
Link To Document :
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