DocumentCode :
3330009
Title :
A parameterizable floating-point logarithm operator for FPGAs
Author :
Detrey, Jeremie ; De Dinechin, Florent
fYear :
2005
fDate :
October 28 - November 1, 2005
Firstpage :
1186
Lastpage :
1190
Keywords :
Application software; Clocks; Delay; Field programmable gate arrays; Filtering; Hardware; Parallel processing; Software design; Software libraries; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems and Computers, 2005. Conference Record of the Thirty-Ninth Asilomar Conference on
ISSN :
1058-6393
Print_ISBN :
1-4244-0131-3
Type :
conf
DOI :
10.1109/ACSSC.2005.1599948
Filename :
1599948
Link To Document :
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