Title :
A parameterizable floating-point logarithm operator for FPGAs
Author :
Detrey, Jeremie ; De Dinechin, Florent
fDate :
October 28 - November 1, 2005
Keywords :
Application software; Clocks; Delay; Field programmable gate arrays; Filtering; Hardware; Parallel processing; Software design; Software libraries; Throughput;
Conference_Titel :
Signals, Systems and Computers, 2005. Conference Record of the Thirty-Ninth Asilomar Conference on
Print_ISBN :
1-4244-0131-3
DOI :
10.1109/ACSSC.2005.1599948