Analysis of a 3–5 GHz UWB CMOS low-noise amplifier for wireless applications

Author

Ansari, Babak ; Shamsi, Hossein ; Shahhoseini, Ali

Author_Institution

Qazvin Branch, Islamic Azad Univ., Iran

fYear

2009

fDate

2-5 Aug. 2009

Firstpage

979

Lastpage

982

Abstract

In this paper, we present the design and analysis of a 3-5 GHz ultra-wideband (UWB) low-noise amplifier (LNA) in a 0.18 mum CMOS process. Simulation results show a power gain of 14 dB with a variation less than 0.5 dB over 3-5 GHz, input and output return loss lower than -9 dB and -8.5 dB, respectively, and noise figure lower than 2.4 dB in the band of interest. The input-referred 1-dB compression point (P_1dB), IIP3, and power consumption of the LNA are about -18 dBm, -5 dBm and 12 mW, respectively.

Keywords

CMOS integrated circuits; field effect MMIC; low noise amplifiers; microwave amplifiers; ultra wideband technology; CMOS process; HSPICE simulation; IIP3; equivalent small-signal model; frequency 3 GHz to 5 GHz; gain 14 dB; input-referred 1-dB compression point; power 12 mW; size 0.18 mum; ultra-wideband low-noise amplifier; CMOS process; Energy consumption; FCC; Impedance matching; Low-noise amplifiers; Noise figure; Radio spectrum management; Thermal resistance; Ultra wideband technology; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2009. MWSCAS '09. 52nd IEEE International Midwest Symposium on

Conference_Location

Cancun

ISSN

1548-3746

Print_ISBN

978-1-4244-4479-3

Electronic_ISBN

1548-3746

Type

conf

DOI

10.1109/MWSCAS.2009.5235930

Filename

5235930