Title :
Piecewise linear delay modeling of CMOS VLSI circuits
Author :
Chang, Jian ; Johnson, Louis G. ; Liu, Cheng
Author_Institution :
Texas Instrum., Inc., Dallas, TX, USA
Abstract :
A piecewise linear delay model is accurate to within plusmn10% of SPICE over a wide range of the input transition time. Model accuracy has improved by taking into account the effect of the input slope and short circuit current. Comparisons with SPICE simulation has been observed in several test circuits.
Keywords :
CMOS integrated circuits; SPICE; VLSI; short-circuit currents; CMOS VLSI circuits; SPICE; input slope; input transition time; piecewise linear delay model; short circuit current; test circuits; Capacitors; Circuit simulation; Delay effects; Delay lines; Piecewise linear approximation; Piecewise linear techniques; Propagation delay; Semiconductor device modeling; Short circuit currents; Very large scale integration; Circuit modeling; VLSI; circuit simulation; delay;
Conference_Titel :
Circuits and Systems, 2009. MWSCAS '09. 52nd IEEE International Midwest Symposium on
Conference_Location :
Cancun
Print_ISBN :
978-1-4244-4479-3
Electronic_ISBN :
1548-3746
DOI :
10.1109/MWSCAS.2009.5235938
