Implementing tree-based multicast routing for write invalidation messages in networks-on-chip

Common distributed shared memory systems using a directory-based protocol operate with unicast messages for write invalidations. The unicast messages serialize the write invalidation transactions, which leads to increased network traffic and latency. This paper proposes an efficient multicast router for a single-flit write invalidation message in on-chip networks. A tree-based routing scheme is followed for multicast routing with a bit-string multidestination encoding. We implemented the tree-based write invalidation router targeting IBM 90 nm technology. In network simulation, the proposed design demonstrated 10.5% reduced latency and 3.2% less energy consumption than the unicast and dual-path router.