A Hardware Implementation of CURUPIRA Block Cipher for Wireless Sensors

Author

Kitsos, Paris ; Selimis, George ; Koufopavlou, Odysseas ; Skodras, Athanassios N.

Author_Institution

Dept. of Comput. Sci., Hellenic Open Univ., Patras

fYear

2008

fDate

3-5 Sept. 2008

Firstpage

850

Lastpage

853

Abstract

An architecture and VLSI implementation of a new block cipher called Curupira is presented in this paper. This cipher is suitable for wireless sensors and RFID applications. Our 0.13 mum implementation requires resources of 9450 gate equivalences and is capable to encrypt a plaintext in 10 clock cycles. The cipher achieves a maximum throughput up to 2361 Mbps at 246 MHz for encrypting/decrypting. When clocked at 100 KHz a throughput of up to 960 Kbps is achieved and an average power of 0.04 mW is drawn.

Keywords

VLSI; cryptography; wireless sensor networks; Curupira block cipher; VLSI; decryption; encryption; frequency 100 kHz; frequency 246 MHz; power 0.04 mW; size 0.13 micron; wireless sensor network; Clocks; Computer architecture; Computer science; Costs; Electronic mail; Hardware; Radiofrequency identification; Security; Throughput; Wireless sensor networks; Curupira block cipher; Lightweight block cipher; RFID; Security; Wireless Sensors;

fLanguage

English

Publisher

ieee

Conference_Titel

Digital System Design Architectures, Methods and Tools, 2008. DSD '08. 11th EUROMICRO Conference on

Conference_Location

Parma

Print_ISBN

978-0-7695-3277-6

Type

conf

DOI

10.1109/DSD.2008.109

Filename

4669325

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3330754