DocumentCode :
3330781
Title :
Digital design using erasable PLDs
Author :
Lala, P.K.
Author_Institution :
Dept. of Electr. Eng., North Carolina A&T State Univ., Greensboro, NC, USA
fYear :
1989
fDate :
9-12 Apr 1989
Firstpage :
1232
Abstract :
The author considers the impact of the newer generations of PLDs (programmable logic devices) on digital design. Particular attention is given to the features of the AND-OR-structured PLDs. It is concluded that the variety of PLDs on the market has given a novel perspective to digital system design. Gate capacities are increasing continuously and reprogrammable architectures are being proposed. Coupled with the dramatic improvements in bipolar and CMOS processes, PLDs now offer greater density, higher speed, and lower power consumption
Keywords :
CMOS integrated circuits; bipolar integrated circuits; logic CAD; logic arrays; AND-OR-structured PLDs; CMOS processes; bipolar ICs; bipolar processes; digital design; digital system design; erasable PLDs; gate capacities; programmable logic devices; reprogrammable architectures; Chromium; Ducts; Fuses; Logic arrays; Logic devices; Logic testing; Mirrors; Programmable logic arrays; Security; State feedback;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Southeastcon '89. Proceedings. Energy and Information Technologies in the Southeast., IEEE
Conference_Location :
Columbia, SC
Type :
conf
DOI :
10.1109/SECON.1989.132619
Filename :
132619
Link To Document :
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