CMOS distributed paraphase amplifier employing derivative superposition linearization for wireless communications

In this paper, the design of a fully-integrated CMOS distributed paraphase amplifier incorporating derivative superposition linearization that allows for broadband distortion reduction is presented. Simulation results has yielded a peak S₂₁ power gain of 5.3 dB and then rolls off to a unity gain bandwidth of 8.2 GHz with less than 10deg phase imbalance and amplitude imbalance of less than 1.26 dB over the band. The simulation results show an 8.5 dB IIP3 improvement and a 13 dBc improvement at output power of -10 dBm. The proposed paraphase amplifier has broadband signal transmission gain that compensates loss and was designed using the 0.13 mum CMOS technology.