Title :
Cache performance of vector processors
Author :
So, Kimming ; Zecca, Vittorio
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fDate :
30 May-2 Jun 1988
Abstract :
An instruction-level simulator for IBM 3090 with VF (vector facility) has been developed for studying the performance of vector processors and their memory hierarchies. Results of a study of the locality of several large scientific applications are presented. The cache miss ratios of vectorized applications are found to be almost equal to those of their original scalar executions. Moreover, both the spatial and temporal locality of these applications (in scalar and vector executions) are strong enough to show a sufficiently high hit ratio on conventional cache structures
Keywords :
buffer storage; parallel architectures; performance evaluation; storage management; virtual machines; IBM 3090; cache miss ratios; instruction-level simulator; memory hierarchies; vector facility; vector processors; Cache memory; Cache storage; Computer applications; Interleaved codes; Multiprocessing systems; Registers; Supercomputers; Tiles; Vector processors;
Conference_Titel :
Computer Architecture, 1988. Conference Proceedings. 15th Annual International Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
0-8186-0861-7
DOI :
10.1109/ISCA.1988.5236
