DocumentCode :
3331665
Title :
FPGA Implementation of Matrix Inversion Using QRD-RLS Algorithm
Author :
Karkooti, Marjan ; Cavallaro, Joseph R. ; Dick, Chris
fYear :
2005
fDate :
October 28 - November 1, 2005
Firstpage :
1625
Lastpage :
1629
Keywords :
Bandwidth; Computer architecture; Field programmable gate arrays; Least squares methods; MIMO; Matrix decomposition; OFDM; Receiving antennas; Signal processing algorithms; Transmitting antennas;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems and Computers, 2005. Conference Record of the Thirty-Ninth Asilomar Conference on
ISSN :
1058-6393
Print_ISBN :
1-4244-0131-3
Type :
conf
DOI :
10.1109/ACSSC.2005.1600043
Filename :
1600043
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3331665
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