Position Statement: Increasing Test Coverage in a VLSI Design Course

It is argued that test and verification (validation) have a lot in common. The test problem is a (small) subset I of the verification problem. The concept of justification is useful for both problems. Practical formal Bbolean equivalence checking tools draw heavily on algorithms from the test field. ATPG techniqu~s are beginning to be applied to other verification problems. A VLSI design course should, therefore, emphasize both manufacturing test and design verification as necessary to produce a quality ptoduct, and these topics should comprise a significant part of the content of the course.