DocumentCode
3331888
Title
Adaptive digital trigger architecture in FPGA
Author
Abba, Andrea ; Manenti, Antonio ; Suardi, Andrea ; Riboldi, Stefano ; Geraci, Angelo
Author_Institution
Dept. of Electron.-DEI, Politec. di Milano, Milan, Italy
fYear
2009
fDate
Oct. 24 2009-Nov. 1 2009
Firstpage
569
Lastpage
572
Abstract
A fully digital trigger architecture for high-resolution spectroscopy is introduced. The proposed architecture is constituted by an ensemble of modules whose proper combination and initialization addresses at best sometimes conflicting requirements, as signal discrimination, multiple hit detection, finite charge-collection time, drifting baseline level, and timing precision. This can be achieved in extremely wide operative conditions, i.e. signal amplitude, event rate, noise features, disturbances. The architecture has been implemented and experimentally validated into a field programmable gate array (FPGA) device.
Keywords
field programmable gate arrays; nuclear electronics; trigger circuits; FPGA; digital trigger architecture; drifting baseline level; event rate; field programmable gate array device; finite charge-collection time; high-resolution spectroscopy; multiple hit detection; noise feature; signal amplitude; signal discrimination; timing precision; wide operative conditions; Circuit noise; Computer architecture; Detectors; Event detection; Field programmable gate arrays; Filters; Spectroscopy; Telephony; Timing; Trigger circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Nuclear Science Symposium Conference Record (NSS/MIC), 2009 IEEE
Conference_Location
Orlando, FL
ISSN
1095-7863
Print_ISBN
978-1-4244-3961-4
Electronic_ISBN
1095-7863
Type
conf
DOI
10.1109/NSSMIC.2009.5401960
Filename
5401960
Link To Document