DocumentCode
3332281
Title
A Hierarchical Placement Procedure with a Simple Blocking Scheme
Author
Murai, Shinichi ; Tsuji, Hiroo ; Kakinuma, Morio ; Sakaguchi, Kazumichi ; Tanaka, Chiyoji
Author_Institution
Mitsubishi Electric Corporation, Kamakura, Japan
fYear
1979
fDate
25-27 June 1979
Firstpage
18
Lastpage
23
Abstract
The outline of a hierarchical placement procedure utilizing a simple blocking scheme is described with the results of the application to the DSA-MOS gate arrays. Indirect clustering value is introduced for the blocking, i.e. grouping of modules under block size restriction. The system including the procedure has been successfully applied to the design of MOS gate arrays with effectively no manual assistance.
Keywords
Clustering algorithms; Graphics; Integrated circuit interconnections; Iterative algorithms; Large scale integration; Physics computing; Printed circuits; Routing; Shape; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 1979. 16th Conference on
Type
conf
DOI
10.1109/DAC.1979.1600082
Filename
1600082
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