DocumentCode :
3332682
Title :
A reconfigurable Markov chain simulator for analysis of parallel systems
Author :
Yamamoto, O. ; Shibata, Yuichiro ; Kurosawa, Hitoshi ; Amano, Hideharu
Author_Institution :
Dept. of Electr. Eng., Tokyo Denki Univ., Japan
fYear :
1997
fDate :
8-10 Oct 1997
Firstpage :
107
Lastpage :
116
Abstract :
Markov chain is a convenient tool to analyze parallel systems for architects who are not experts of theoretical analysis. However, it is sometimes difficult to use especially when the model becomes complicated or extremely small probabilities are used in the model. In this paper, we propose a reconfigurable Markov chain simulation system and evaluate on a reconfigurable testbed. In this system, a user describes the target system in a dedicated description language called “Taico”. The description is automatically translated into the Verilog-HDL description, of the Markov chain simulator. Then, the simulator is implemented on a reconfigurable testbed called FLEMING, and executed directly. From the evaluation with analysis of example parallel systems, it appears that the simulation speed of proposed system is more than hundreds times faster than software simulation on a high speed workstation
Keywords :
Markov processes; hardware description languages; parallel architectures; reconfigurable architectures; FLEMING testbed; Taico; Verilog-HDL; description language; parallel system; reconfigurable Markov chain simulator; Analytical models; Circuit simulation; Computational modeling; Computer simulation; Field programmable gate arrays; Hardware design languages; Logic testing; Performance analysis; Programmable logic arrays; Workstations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Innovative Systems in Silicon, 1997. Proceedings., Second Annual IEEE International Conference on
Conference_Location :
Austin, TX
ISSN :
1094-7116
Print_ISBN :
0-7803-4276-3
Type :
conf
DOI :
10.1109/ICISS.1997.630251
Filename :
630251
Link To Document :
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