ΔΣ time interleaved current steering DAC with dynamic elements matching

The architecture for very-high speed DAC with medium oversampling and high resolution is discussed. The scheme uses an hybrid sigma-delta scheme that processes LSBs of the input word and obtain digital to analog conversion with an hybrid current steering DAC with dynamic element matching of MSBs and time interleaved conversion of LSBs. The return-to-zero for all elements ensures the required linearity of the analog output. Computer simulations verify the benefit of the scheme.