DocumentCode :
3332890
Title :
Voltage regulator module (VRM) transient modeling and analysis
Author :
Wong, Pit-Leong ; Lee, Fred C. ; Zhou, Xunwei ; Chen, Jiabin
Author_Institution :
Center for Power Electron. Syst., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA
Volume :
3
fYear :
1999
fDate :
1999
Firstpage :
1669
Abstract :
In this paper, the transient response of the voltage regulator module (VRM) output voltage when the processor has a sudden load change is analyzed. The parasitic parameters play important roles in the transient. The system can be divided into several resonant loops. Each loop can be considered approximately as a decoupled second order system. The voltage drop of the capacitor is analyzed. By reducing the inductance and increasing converter bandwidth, the transient of VRM can be improved
Keywords :
control system analysis; power convertors; transient analysis; transient response; voltage control; voltage regulators; capacitor voltage drop; decoupled second order system; inductance reduction; output voltage transient response; power converter bandwidth; resonant loops; transient analysis; transient modelling; voltage regulator module; Capacitors; Clocks; Energy consumption; Frequency; Low voltage; Power supplies; Regulators; Resonance; Transient analysis; Transient response;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Industry Applications Conference, 1999. Thirty-Fourth IAS Annual Meeting. Conference Record of the 1999 IEEE
Conference_Location :
Phoenix, AZ
ISSN :
0197-2618
Print_ISBN :
0-7803-5589-X
Type :
conf
DOI :
10.1109/IAS.1999.805965
Filename :
805965
Link To Document :
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