Title :
Logic Verification System for Very Large Computers Using LSI´s
Author :
Ohno, Yasuhiro ; Miyoshi, Masayuki ; Sato, Katsuya
Author_Institution :
Kanagawa Works, Hitachi, Ltd.,Kanagawa, Japan
Abstract :
To aid design verification of very large computers using many LSI´s, software tools including a logic simulator with capability of 750,000 gates have been developed.
Keywords :
Circuit simulation; Circuit testing; Computer errors; Delay; Large scale integration; Logic circuits; Logic design; Logic testing; Optical design; Process design;
Conference_Titel :
Design Automation, 1979. 16th Conference on
DOI :
10.1109/DAC.1979.1600138
