Design and implementation of the baseband section for a 900MHz passive tag in a 0.5µm CMOS process

The design and implementation of digital circuitry for building a 900MHz passive tag in a standard 0.5mum CMOS technology is presented. The digital circuitry (hereafter called Digital Section, DS) including a voltage-controlled oscillator (VCO) satisfies the baseband requirements of ISO/IEC18000-6 type A standard. To verify the DS´s functionality, a basic Tag-Reader was designed in order to apply test sequences. Power consumption, maximum operation frequency, and area utilization analyses were done using Synopsy´s Design Compiler. The obtained results show that the proposed architecture fulfils the requirements stated for the implementation.