• DocumentCode
    3334018
  • Title

    A 6.5–9 GHz vector-sum phase shifter for heterodyne transceiver with IF beamforming

  • Author

    Yu-Tsung Lo ; Jean-Fu Kiang

  • Author_Institution
    Nat. Taiwan Univ., Taipei, Taiwan
  • fYear
    2011
  • fDate
    8-10 Aug. 2011
  • Firstpage
    75
  • Lastpage
    78
  • Abstract
    A vector-sum phase shifter (VSPS) is proposed for heterodyne transceiver with IF beamforming. The phase shifter is controlled at 16 states with phase intervals of 22.5°. The maximum phase error is less than 5°, the insertion loss ranges from 11 to 13.5 dB across 6.5-9 GHz. The chip is implemented using 0.18μm RF-mixed signal CMOS process, which consumes less than 13 mW among all states.
  • Keywords
    CMOS analogue integrated circuits; MMIC phase shifters; array signal processing; field effect MMIC; mixed analogue-digital integrated circuits; radio transceivers; IF beamforming; RF-mixed signal CMOS process; VSPS; frequency 6.5 GHz to 9 GHz; heterodyne transceiver; insertion loss; loss 11 dB to 13.5 dB; phase error; vector-sum phase shifter; Array signal processing; Arrays; Electronics packaging; Gain; Microwave filters; Phase shifters; Radio frequency;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electromagnetics, Applications and Student Innovation (iWEM), 2011 IEEE International Workshop on
  • Conference_Location
    Taipei
  • Print_ISBN
    978-1-61284-462-6
  • Electronic_ISBN
    978-1-61284-461-9
  • Type

    conf

  • DOI
    10.1109/iWEM.2011.6021484
  • Filename
    6021484