Title :
A 1-GS/s 6-bit flash ADC in 90 nm CMOS
Author :
Shaker, Mohamed O. ; Gosh, Soumik ; Bayoumi, Magdy A.
Author_Institution :
Center for Adv. Comput. Studies, Univ. of Louisiana at Lafayette, Lafayette, LA, USA
Abstract :
In this paper, a new design for a low power CMOS flash analog-to-digital converter (ADC) is proposed. A 6-bit flash ADC, with a maximum acquisition speed of 1 GHz, is implemented in a 1.2 V analog supply voltage. HSpice simulation results for the proposed flash ADC verifying the analytical results are also given. It shows that the proposed 6-bit flash ADC consumes about 72 mW in a commercial 90 nm CMOS process. The new design offers lower number of comparators and lower power consumption compared with the traditional flash ADC.
Keywords :
CMOS integrated circuits; analogue-digital conversion; comparators (circuits); flash memories; low-power electronics; HSpice simulation; analog supply voltage; analog-to-digital converter; comparator; low power CMOS flash ADC design; size 90 nm; storage capacity 6 bit; voltage 1.2 V; Analog-digital conversion; Analytical models; Binary codes; CMOS process; Clocks; Energy consumption; Multiplexing; Signal generators; Signal resolution; Voltage control;
Conference_Titel :
Circuits and Systems, 2009. MWSCAS '09. 52nd IEEE International Midwest Symposium on
Conference_Location :
Cancun
Print_ISBN :
978-1-4244-4479-3
Electronic_ISBN :
1548-3746
DOI :
10.1109/MWSCAS.2009.5236133
